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* SPLASH build system v0.1                                                                                             *
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* Copyright (c) 2013 Andrew D. Zonenberg                                                                               *
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#ifndef FPGAToolchain_h
#define FPGAToolchain_h

class FPGAToolchain;

typedef BuildFlag<FPGAToolchain> FPGASynthesisFlag;
typedef BuildFlagList<FPGASynthesisFlag> FPGASynthesisFlagList;

typedef BuildFlag<FPGAToolchain> FPGAPlaceAndRouteFlag;
typedef BuildFlagList<FPGAPlaceAndRouteFlag> FPGAPlaceAndRouteFlagList;

typedef BuildFlag<FPGAToolchain> FPGATimingAnalysisFlag;
typedef BuildFlagList<FPGATimingAnalysisFlag> FPGATimingAnalysisFlagList;

typedef BuildFlag<FPGAToolchain> FPGABitstreamGenerationFlag;
typedef BuildFlagList<FPGABitstreamGenerationFlag> FPGABitstreamGenerationFlagList;

#include "FPGABuildFlags.h"

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// The toolchain proper

class FPGAToolchain : public Toolchain
{
public:
	FPGAToolchain();
	virtual ~FPGAToolchain();
	
	///@brief Compiles one or more source files to a native simulation executable.
	virtual ClusterJob* CompileSourcesToNativeSimulation(
		std::vector<std::string> source_files,
		std::string output_filename,
		const std::vector<ClusterJob*>& deps,
		std::string top_level,
		std::string device,
		Cluster* cluster
		) =0;
		
	///@brief Synthesizes one or more source files to an unplaced binary netlist (in toolchain-dependent format)
	virtual ClusterJob* SynthesizeSourcesToUnplacedNetlist(
		std::vector<std::string> source_files,
		std::string output_filename,
		const std::vector<ClusterJob*>& deps,
		std::string top_level,
		std::string device,
		FPGASynthesisFlagList flags,
		Cluster* cluster
		) =0;	
		
	//Xilinx has translate and map steps between here, but not the generic tool path
		
	///@brief Place and route an unplaced netlist.
	virtual ClusterJob* PlaceAndRouteNetlist(
		std::string input_netlist,
		std::string constraints,
		std::string output_filename,
		std::string device,
		const std::vector<ClusterJob*>& deps,
		FPGAPlaceAndRouteFlagList flags,
		Cluster* cluster
		) =0;
		
	///@brief Run static timing analysis on a placed netlist
	virtual ClusterJob* StaticTimingAnalysis(
		std::string input_netlist,
		std::string constraints,
		std::string output_filename,
		int speedgrade,
		const std::vector<ClusterJob*>& deps,
		FPGATimingAnalysisFlagList flags,
		Cluster* cluster
		) =0;
		
	///@brief Generates a bitstream from a placed netlist
	virtual ClusterJob* GenerateBitstream(
		std::string input_netlist,
		std::string constraints,
		std::string output_filename,
		std::string device,
		const std::vector<ClusterJob*>& deps,
		FPGABitstreamGenerationFlagList flags,
		Cluster* cluster
		) =0;
		
	virtual ClusterJob* GenerateCPLDBitstream(
		std::string input_netlist,
		std::string output_filename,
		const std::vector<ClusterJob*>& deps,
		Cluster* cluster
		) =0;
		
	virtual std::string GetArchitecture(std::string device) const =0;
		
	virtual std::string GetSynthesisFlagHash(const FPGASynthesisFlagList& flags) =0;

protected:

	static std::map<std::string, FPGAToolchain*> m_cachedToolchains;
};

#endif

